Regviz

NXP Semiconductors /LPC408x_7x /USB /EPDMAST

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as EPDMAST

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/NeoM3/USB/EPDMAST#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EP_DMA_ST0)EP_DMA_ST0 0 (EP_DMA_ST1)EP_DMA_ST1 0 (EP_DMA_ST2)EP_DMA_ST2 0 (EP_DMA_ST3)EP_DMA_ST3 0 (EP_DMA_ST4)EP_DMA_ST4 0 (EP_DMA_ST5)EP_DMA_ST5 0 (EP_DMA_ST6)EP_DMA_ST6 0 (EP_DMA_ST7)EP_DMA_ST7 0 (EP_DMA_ST8)EP_DMA_ST8 0 (EP_DMA_ST9)EP_DMA_ST9 0 (EP_DMA_ST10)EP_DMA_ST10 0 (EP_DMA_ST11)EP_DMA_ST11 0 (EP_DMA_ST12)EP_DMA_ST12 0 (EP_DMA_ST13)EP_DMA_ST13 0 (EP_DMA_ST14)EP_DMA_ST14 0 (EP_DMA_ST15)EP_DMA_ST15 0 (EP_DMA_ST16)EP_DMA_ST16 0 (EP_DMA_ST17)EP_DMA_ST17 0 (EP_DMA_ST18)EP_DMA_ST18 0 (EP_DMA_ST19)EP_DMA_ST19 0 (EP_DMA_ST20)EP_DMA_ST20 0 (EP_DMA_ST21)EP_DMA_ST21 0 (EP_DMA_ST22)EP_DMA_ST22 0 (EP_DMA_ST23)EP_DMA_ST23 0 (EP_DMA_ST24)EP_DMA_ST24 0 (EP_DMA_ST25)EP_DMA_ST25 0 (EP_DMA_ST26)EP_DMA_ST26 0 (EP_DMA_ST27)EP_DMA_ST27 0 (EP_DMA_ST28)EP_DMA_ST28 0 (EP_DMA_ST29)EP_DMA_ST29 0 (EP_DMA_ST30)EP_DMA_ST30 0 (EP_DMA_ST31)EP_DMA_ST31

Description

USB Endpoint DMA Status

Fields

EP_DMA_ST0

Control endpoint OUT (DMA cannot be enabled for this endpoint and the EP0_DMA_ENABLE bit must be 0).
EP_DMA_ST1

Control endpoint IN (DMA cannot be enabled for this endpoint and the EP1_DMA_ENABLE bit must be 0).
EP_DMA_ST2

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST3

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST4

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST5

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST6

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST7

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST8

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST9

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST10

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST11

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST12

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST13

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST14

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST15

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST16

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST17

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST18

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST19

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST20

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST21

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST22

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST23

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST24

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST25

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST26

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST27

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST28

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST29

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST30

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.
EP_DMA_ST31

Endpoint xx (2 <= xx <= 31) DMA enabled bit. 0 = The DMA for endpoint EPxx is disabled. 1 = The DMA for endpoint EPxx is enabled.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data